Job Title:SystemC Modelling Engineer

Location:Redmond, WA (Remote)





Must Have Skills

SystemC Modelling Engineer

Skill 1 – 8 + Yrs of Exp in SystemC & TLM

Skill 2 – 4+ Yrs of Exp in Hardware Description Languages (HDLs): VHDL or Verilog

Skill 3 – 5 + Yrs of Exp in Python



Required Skills:

• SystemC & TLM (Transaction Level Modeling)

• C++ (Proficient level, including object-oriented design principles)

• Hardware Description Languages (HDLs): VHDL or Verilog (Understanding and ability to interface with)

• Simulation Tools (e.g., Cadence Incisive, Synopsys VCS, Mentor Graphics QuestaSim)

• Debugging Tools (e.g., GDB, DVE)

• Scripting Languages (Python, Perl, or similar)

• Version Control Systems (Git)

• Embedded Systems Architecture (Understanding of processor architectures, memory hierarchies, and bus protoco...