Accountable to provide leadership to meet business milestone, cost and quality in GPU system level test area.
Collaborate with internal teams to drive IVR (Integrated Voltage Regulator) SLT swim lane from pre-silicon, ASIC initial bring up to HVM (High Volume Manufacturing)
Solves complex, novel, and non-recurring problems; initiates significant changes to existing processes/methods and leads development and implementation
Conduct engineering evaluations and analysis to qualify cutting-edge IVR for HVM and drive closure of GPU production issues
Profile or characterize PI (Power Integrity), voltage droop, or power delivery issue observed on SLT platforms in collaboration with board/silicon designers
Involves collaboration on or assuming the consultative or leadership responsibilities for a specific project or for product development initiatives