Lattice Semiconductor is seeking a Design Verification Engineer to join the R&D organization. This position offers the opportunity to be part of a dynamic team with ample opportunities to contribute, learn, and grow.
Responsibilities & Skills
Develop and review test plans based on design specifications.
Create constrained‑random verification environments for complex DUTs.
Implement coverage metrics using cover points and assertions.
Write and debug tests for DUTs.
Resolve bugs in collaboration with remote designers.
Requirements
Strong understanding of verification process from test plan to coverage completion.
Excellent communication and analytical skills.
Experience with pre‑silicon design verification using UVM/OVM.