Advance your career as a Senior SerDes System/DSP Design Engineer with Ciena, focusing on high-speed data communication in a flexible, innovative environment.

Ciena is seeking a highly skilled engineer to lead architecture and development in its advanced engineering team. This role entails working on high-speed serial transceivers, integrating DSP algorithms with robust control theory. Shape the future of network connectivity through innovation in SerDes technology and optical communications.

Key Responsibilities:
• Lead electrical SerDes DSP architecture design
• Perform system-level evaluation and performance analysis
• Develop adaptive equalization and MLSD algorithms
• Integrate DSP designs into hardware implementations
• Collaborate with cross-functional teams for performance optimization

Requirements:
• Advanced expertise in SerDes DSP design
• 8+ years in high-speed communication system design
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