At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Job Title: Principal Design Engineer

Location: Bangalore



Job Summary:

We are looking for a candidate with excellent communication skills and ability to ramp up on new technologies quickly and independently. This position requires the technical expertise in DDR memory protocols such as DDR, LPDDR and particularly HBM. This an excellent opportunity to work in a supportive and friendly work environment, where we are vested in each other’s success, and are passionate about technology and innovation.



Position Description:
+ Functional Verification Engineer role for DDR Subsystem Verification team. Position is based in Bangalore.
+ The role would include functional verification of the DDR Subsystem that comprises of DDR Memory Controller and PHY IP solution of Cadence.
+ The work involved will be working with th...