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Physical Design Engineer/Lead

Company

eInfochips

Location

maharashtra, pune district

Type

Full-time

Block Build PD (Lead-8 years) * Block level Physical Design Implementation from RTL to GDSII or Netlist to GDSII, * Block level Physical Signoff, * Block level Timing Signoff and ECO generation. * Block level Power (EM/IR) signoff. * Good skill on Automation (Perl/Tcl/Awk/Python) * Able to provide technical guidance to Junior Engineer and lead 4-6 engineers. * Must have led small project team. * Good in communication skill as point of contact for client. Block Build PD (Individual Contributor-4) * Block level Physical Design Implementation from RTL to GDSII or Netlist to GDSII, * Block level Physical Signoff, * Block level Timing Signoff and ECO generation. * Block level Power signoff. * Good skill on Automation (Perl/Tcl/Awk/Python) Physical Verification (Full Chip-8) * Experience in Full chip and Block level Physical Verification (DRC, LVS, Antenna, ERC) on lower Technology nodes * Good to have exposure in RDL Routing and Resistance checks. * Knowledge about PDN * Good exposure of Ca...

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