Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field; Master's preferred

10+ years of experience in physical design implementation of complex SoCs at advanced nodes (7nm and below)

2+ years of experience leading teams or projects with demonstrated ability to mentor and develop engineers

Hands‑on expertise across the physical design flow: synthesis, place‑and‑route, CTS, extraction, timing closure, EM‑IR, DRC/LVS, and equivalence checking

Proficiency with Cadence Innovus and/or Synopsys Fusion Compiler/ICC2 and supporting toolchains

Strong scripting ability in Tcl, Python, and/or Perl

Professional attitude with the ability to prioritize a dynamic list of tasks, plan and prepare for customer meetings in advance, and work with minimal guidance

Entrepreneurial, open‑minded behavior and can‑do attitude. Think and act fast with the customer in mind!

Experience with C...