π Location: Bay Area, California (Onsite at Client Location)
π’ Work Mode: Full-Time | Work From Office (WFO)
π Work Authorization: Valid US Work Visa Required
About the Role
We are looking for an experienced Senior Design Engineer with strong expertise in SoC architecture, RTL development, and high-performance interconnects. The ideal candidate will play a key role in designing next-generation semiconductor solutions for cutting-edge compute and connectivity platforms.
Experience
β 8β12 Years of Industry Experience
Key Responsibilities
RTL Design & Development
Design and develop synthesizable RTL for: