Job Title: DV Engineer (x86, ARM )
Location: Hyderabad
Experience required: 4 to 6 years

Job Description:
Strong understanding the design and verification life cycle.
Hands on verification experience with C/C++/System Verilog testbench development.
Hands on experience with coverage planning, coding and coverage closure.
Experience with x86, ARM or any other industry standard microprocessor ISA.
Experience with Cache, Coherency and Data-Consistency verification.
Experience in clocking, reset, power-up sequences and power management verification.
Knowledge of microprocessor design-for-debug (DFD) logic will be a plus.
Understanding of low power design verification techniques is a plus.