Berkeley Lab’s has an opening for a Beyond Moore Computational Research Scientist to evaluate and develop devices to hardware/circuit co-design flow for architectural specializations for high performance computing neuromorphic and edge computing applications.

In the absence of Moore’s Law Scaling, the DOE must investigate alternative paths to continuing computing performance improvements for scientific applications through architectural specialization. Since the beginning of the microchip, we have become accustomed to Moore’s Law relentlessly delivering a doubling of performance, energy efficiency, and density for high-performance computing (HPC) (and all electronic devices) every 18–24 months. This expectation has led to a relatively stable ecosystem built around general-purpose processor technologies such as the x86, ARM, and Power instruction set architectures. However, with the tapering of lithography improvements, shrinking transistors can no longer be relied on exclusive...